1 ? fn6867.2 isl9021 250ma single ldo with low i q , low noise and high psrr ldo the isl9021 is a single ldo providing high performance low input voltage, high psrr. it delivers guaranteed continuous 250ma load current and is stable with 1f to 4.7f of output capacitance (30%) with an esr range of 5m to 400m . the input voltage range for the isl9021 is between 1.5v to 5.5v and the output voltage comes in many fixed voltage options with 1.8% accuracy ov er temperature, line and load ranges. other output vo ltage within the range of 0.9v to 3.3v may be available upon request. the isl9021 has typical psrr of 75db @ 10khz and 50db @ 1mhz. the reverse current protection feature prevents current from flowing back to the power source when the output voltage is pulled higher than the input. the isl9021 is offered in tiny 4-bump 1.155mmx0.975mm wlcsp and 1.6mmx1.6mm 6 ld tdfn packages. pinouts isl9021 (6 ld 1.6x1.6 tdfn) top view isl9021 (4 ball 1.155x0.975 wlcsp) top view features ? high performance ldo with 250ma guaranteed continuous output current ? input voltage range: 1.5v to 5.5v ? output voltage range: 0.9v to 3.3v ? high psrr: 75db @ 10khz, 50db @ 1mhz ? low quiescent current: 35a ? dropout voltage: <150mv @ 250ma ? stable with 1f to 4.7f output capacitance (30%) with an esr range of 5m to 400m ? 1.8% output accuracy ov er-temperature/load/line ? soft-start limits input current surge during enable ? current limit and overheat protection ? -40c to +85c operating temperature range ? available in 1.155mmx0.975mm 4-bump wlcsp package and 1.6mmx1.6mm 6 ld tdfn ? pb-free (rohs compliant) applications ? pdas, cell phones and smart phones ? portable instruments, mp3 players ? handheld devices including medical handhelds 1 2 3 4 5 6 vin gnd nc vo nc en vin en gnd vout a1 b1 a2 b2 datasheet january 14, 2010 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2009, 2010. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn6867.2 january 14, 2010 ordering information part number part marking v o voltage (note 2) temp range (c) package tape & reel (pb-free) package dwg. # isl9021ii1z-t (notes 1, 3) 0211 1.1 -40 to +85 4 ball wlcsp w2x2.4 isl9021ii2z-t (notes 1, 3) 0212 2.1 -40 to +85 4 ball wlcsp w2x2.4 isl9021ii3z-t (notes 1, 3) 0213 1.3 -40 to +85 4 ball wlcsp w2x2.4 isl9021ii4z-t (notes 1, 3) 0214 1.0 -40 to +85 4 ball wlcsp w2x2.4 isl9021iibz-t (notes 1, 3) 021b 1.5 -40 to +85 4 ball wlcsp w2x2.4 isl9021iicz-t (notes 1, 3) 021c 1.8 -40 to +85 4 ball wlcsp w2x2.4 isl9021iifz-t (notes 1, 3) 021f 2.5 -40 to +85 4 ball wlcsp w2x2.4 isl9021iigz-t (notes 1, 3) 021g 2.7 -40 to +85 4 ball wlcsp w2x2.4 isl9021iijz-t (notes 1, 3) 021j 2.8 -40 to +85 4 ball wlcsp w2x2.4 isl9021iikz-t (notes 1, 3) 021k 2.85 -40 to +85 4 ball wlcsp w2x2.4 isl9021iimz-t (notes 1, 3) 021m 3.0 -40 to +85 4 ball wlcsp w2x2.4 isl9021iinz-t (notes 1, 3) 021n 3.3 -40 to +85 4 ball wlcsp w2x2.4 isl9021iipz-t (notes 1, 3) 021p 1.85 -40 to +85 4 ball wlcsp w2x2.4 isl9021iirz-t (notes 1, 3) 021r 2.6 -40 to +85 4 ball wlcsp w2x2.4 isl9021iisz-t (notes 1, 3) 021s 1.6 -40 to +85 4 ball wlcsp w2x2.4 isl9021iitz-t (notes 1, 3) 021t 1.9 -40 to +85 4 ball wlcsp w2x2.4 isl9021iiwz-t (notes 1, 3) 021w 1.2 -40 to +85 4 ball wlcsp w2x2.4 isl9021iiyz-t (notes 1, 3) 021y 0.9 -40 to +85 4 ball wlcsp w2x2.4 isl9021iru1z-t (notes 1, 4) s1 1.1 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021iru2z-t (notes 1, 4) s9 2.1 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021iru3z-t (notes 1, 4) s3 1.3 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021iru4z-t (notes 1, 4) s0 1.0 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irubz-t (notes 1, 4) s4 1.5 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irucz-t (notes 1, 4) s6 1.8 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irufz-t (notes 1, 4) t0 2.5 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irugz-t (notes 1, 4) t2 2.7 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irujz-t (notes 1, 4) t3 2.8 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irukz-t (notes 1, 4) t4 2.85 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irumz-t (notes 1, 4) t5 3.0 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irunz-t (notes 1, 4) r8 3.3 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irupz-t (notes 1, 4) s7 1.85 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irurz-t (notes 1, 4) t1 2.6 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irusz-t (notes 1, 4) s5 1.6 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021irutz-t (notes 1, 4) s8 1.9 -40 to +85 6 ld tdfn l6.1.6x1.6 ISL9021IRUWZ-T (notes 1, 4) s2 1.2 -40 to +85 6 ld tdfn l6.1.6x1.6 isl9021iruyz-t (notes 1, 4) r9 0.9 -40 to +85 6 ld tdfn l6.1.6x1.6 notes: 1. please refer to tb347 for de tails on reel specifications. 2. for other output voltages, contact intersil marketing. 3. these intersil pb-free wlcsp and bga packaged products employ s pecial pb-free material sets; molding compounds/die attach mat erials and snagcu - e1 solder ball terminals, which are rohs compliant and compatible with both snpb and pb-free soldering operations. int ersil pb-free wlcsp and bga packaged products are msl classified at pb-free peak re flow temperatures that meet or exceed the pb-free requirem ents of ipc/jedec j std-020. 4. these intersil pb-free plastic packaged pr oducts employ special pb-free material se ts; molding compounds/die attach materials and nipdau plate - e4 termination finish, which is rohs compliant and comp atible with both snpb and pb-free soldering operations. intersi l pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. isl9021
3 fn6867.2 january 14, 2010 absolute maximum rati ngs thermal information supply voltage (vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.5v all other pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (vin + 0.3)v recommended operating conditions ambient temperature range (t a ) . . . . . . . . . . . . . . .-40c to +85c supply voltage (v in ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 to 5.5v thermal resistance (typical, note 5) ja (c/w) 4 ball wlcsp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135.64 6 lead tdfn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 junction temperature range . . . . . . . . . . . . . . . . .-40c to +125c operating temperature range . . . . . . . . . . . . . . . . .-40c to +85c storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 5. ja is measured in free air with the component mounted on a high ef fective thermal conductivity te st board with ?direct attach? fe atures. see tech brief tb379. electrical specifications t a = -40c to +85c; v in = (v o + 0.5v) to 5.5v with a minimum v in of 1.5v; c in = 1f; c o = 1f; parameters with min and/or max limits are 100% tested at +25c, unless otherwise specified. temperature limits established by characterizati on and are not production tested. parameter symbol test conditions min typ max unit dc characteristics supply voltage v in 1.5 5.5 v v in undervoltage lockout threshold v uvlo+ v in rising 1.425 1.5 v v uvlo- v in falling 1.3 1.375 v ground current i dd output enabled; i o = 0; v in = 1.5v to 5.5v 35 50 a shutdown current i dds v in = 5.5v, en = low, i o = 0 0.1 1.0 a output voltage accuracy v in = v o + 0.5v to 5.5v, i o = 1ma to 150ma, t j = +25c -0.8 +0.8 % v in = v o + 0.5v to 5.5v, i o = 1ma to 150ma, t j = -40c to +125c -1.8 +1.8 maximum output current i max continuous 250 ma internal current limit i lim 260 ma dropout voltage (notes 6, 7) v do i o = 250ma; v o > 1.8v 150 250 mv thermal shutdown temperature t sd 160 c thermal shutdown hysteresis 20 c ac characteristics ripple rejection (note 6) v in = 4.5v, v o = 3.3v @ 1khz 60 db v in = 4.5v, v o = 3.3v @ 10khz 75 db v in = 4.5v, v o = 3.3v @ 1mhz 50 db output noise voltage (note 6) v in = 4.2v, t a = +25c, bw = 10hz to 100khz, i o = 10ma 8.5*v o v rms device start-up characteristics device enable time t en time from assertion of the en pin to when the output voltage reaches 95% of the v o (nom) 250 600 s ldo soft-start ramp rate t ssr slope of linear portion of ldo output voltage ramp during start-up 30 60 s/v en logic characteristics input low voltage v il 0.4 v input high voltage v ih 1.1 v input leakage current i il, i ih 0.1 a notes: 6. limits established by characteri zation and are not production tested. 7. dropout voltage is measured as v in - v o , when v o is 4% lower than the value of v o ; when v in = v o + 0.5v. isl9021
4 fn6867.2 january 14, 2010 typical operating performance figure 1. quiescent current vs input voltage (v out = 0.9v) figure 2. quiescent current vs input voltage (v out = 1.85v) figure 3. quiescent current vs input voltage (v out = 3.3v) figure 4. load regulation vs temperature (v out =1.85v) figure 5. line regulation vs temperature (v out = 1.85v) figure 6. load regulation vs temperature (v out =3.3v) 0 5 10 15 20 25 30 35 40 45 1.52.53.54.55.5 input voltage (v) quiescent current (a) t = +85c t = +45c t = room temp t = 0c t = -25c t = -40c 0 5 10 15 20 25 30 35 40 45 1.5 2.5 3.5 4.5 5.5 input voltage (v) quiescent current (a) t = +85c t = room temp t = 0c t = -25c t = -40c t = +45c -10 0 10 20 30 40 50 3.5 4.0 4.5 5.0 5.5 6.0 input voltage (v) quiescent current (a) t = +85c t = +45c t = room temp t = 0c t = -25c t = -40c 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 0 50 100 150 200 250 300 io (ma) vo (v) -40c +25c +85c 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.53.54.55.56.5 v in (v) vo (v) -40c +25c +85c 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 0 50 100 150 200 250 300 io (ma) vo (v) -40c +25c +85c isl9021
5 fn6867.2 january 14, 2010 figure 7. line regulation vs temperature (v out =3.3v) figure 8. load regulation vs temperature (v out =0.9v) figure 9. line regulation vs temperature (v out =0.9v) figure 10. load t ransient response figure 11. load transient response figure 12. enable function (v in = 3.6v, v out = 1.85v, c out 1f) typical operating performance (continued) 3.00 3.05 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.5 4.0 4.5 5.0 5.5 6.0 v in (v) vo (v) -40c +25c +85c 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 0 50 100 150 200 250 300 io (ma) vo (v) -40c +25c +85c 0.70 0.75 0.80 0.85 0.90 0.95 1.00 3.0 3.5 4.0 4.5 5.0 5.5 6.0 v in (v) vo (v) -40c +25c +85c v out = 1.85v i out = 1ma to 250ma c out = 1f v out i out v in = 2.7v v out = 1.85v i out = 1ma to 250ma c out = 4.7f v out i out v in = 2.7v isl9021
6 fn6867.2 january 14, 2010 typical application figure 13. power supply rejection vs frequency pin descriptions pin name description vin ic supply/ldo input. connect a 1f capacitor to gnd. gnd system ground pin. en ldo enable. when this signal go es high, the ldo is turned on. vo ldo output. connect a 1f to 4.7f capacitor to gnd. e-pad for tdfn package option only. connect it to the system ground. typical operating performance (continued) -90 -80 -70 -60 -50 -40 -30 -20 100 1k 10k 100k 1m frequency (hz) psrr (db) v in = 4.5vdc + 50mvac c out = 1f i o = 0a i o = 10ma c1, c2: 1f x5r ceramic capacitor isl9021 vin gnd vo vin (1.5v to 5.5v) vout c1 c2 en enable off on isl9021
7 fn6867.2 january 14, 2010 block diagram pass element control logic short-circuit protection thermal protection soft-start temp sensor bandgap voltage and reference generator + vin en vout gnd isl9021
8 fn6867.2 january 14, 2010 functional description the isl9021 is a high performance low-dropout regulator (ldo) with 250ma sourcing capability. the extra low ground current makes this part a good choice for handheld product applications. the device also incorporates overcurrent, thermal shutdown, reverse current protections, and soft-start features. thermal shutdown protects the device against overheating. soft-start limits the start-up in put current surges. in some applications, the output voltage may be externally pulled higher than input, or the input voltage could be connected to ground, or connected to some voltage lower than the output side. the isl9021 features reve rse current protection; that can block the reverse current from output to input. enable control the isl9021 has an enable pin. when en is low, the ic is in shutdown mode. in this condition, all on-chip circuits are off, and the device draws minimum current, typically less than 0.1a(typ). driving this pin high will turn on the device. ldo protections the isl9021 offers several protection functions, making it ideal for use in battery-powered applications.the isl9021 provides short-circuit protection by limitin g the output current at current limit of 260ma(min). if the shor t circuit lasts long enough, the die temperature increases, and the over-temperature protection circuit will shut down the output. when the die temperature reaches about +145c, thermal protection starts to work with output being loaded with at least 50ma. once the die temperature drops to about +110c, the ldo will resume operation beginning with a soft-start. the isl9021?s reverse current protection is intended to block reverse conduction if output voltage is higher than input voltage. input and output capacitors the isl9021 provides a linear regulator that has low quiescent current, fast transient response, and overall stable operation across the recomm ended operating conditions. a ceramic capacitor (x5r or x7r) with a capacitance of 1f to 4.7f with an esr up to 400m is suitable for the isl9021 to maintain its output stability. the ground connection of the output capacitor should be routed directly to the gnd pin of the device, and also placed close to the ic. similarly for the input capacitor, usually a 1f ceramic capacitor (x5r or 7r) is suitable for most cases, but if a large, fast rising load transient condition is expected, a higher value input capacitor may be necessary to achieve satisfactory performance. board layout recommendations a good pcb layout is an important step to achieve good performance. it is recommended to design the board with separate ground planes for input and output, and connect both ground planes at the gnd pin of the ic. consideration should be taken when placing the components and routing the trace to minimize the ground impedance, and keep the parasitic inductance low. usually the input/output capacitors should be placed as close to the ic as possible with a good ground connection. isl9021
9 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6867.2 january 14, 2010 isl9021 wafer level chip scale package (wlcsp 0.4mm ball pitch) side view top view bottom view pin 1 e d a2 b a1 e ( e1 ) se e ( d1 ) 2 b a b sd a 1 w2x2.4 2x2 array 4 ball wafer level chip scale package symbol millimeters a 0.44 min, 0.495 nom, 0.55 max a1 0.190 0.030 a2 0.305 0.025 b 0.270 0.030 d 1.155 0.020 d1 0.400 basic e 0.975 0.020 e1 0.400 basic e 0.400 basic sd 0.200 basic se 0.00 basic number of bumps: 4 rev. 2 6/08 notes: 1. all dimensions are in millimeters.
10 fn6867.2 january 14, 2010 isl9021 package outline drawing l6.1.6x1.6 6 lead ultra thin dual flat no-l ead col plastic package (utdfn col) rev 1, 11/07 typical recommended land pattern detail "x" top view bottom view side view located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 id entifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: 1.60 5x 0 . 40 0 . 1 0.15 ( 1 . 4 ) (4x) ( 6x 0 . 25 ) ( 1x 0 .70 ) ( 4x 0 . 5 ) 0 . 55 max base plane c seating plane 0.08 c 0.10 c 0.25 +0.05 / -0.07 see detail "x" 0.10 4 ca mb index area 6 pin 1 1.60 a b pin #1 index area 0.50 2x 1.00 4x 6 ( 5x 0 . 60 ) 0 . 00 min. 0 . 05 max. c 0 . 2 ref 4 3 6 1 1x 0.5 0.1
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